Publications

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Author Title Type [ Year(Desc)]
Filters: Author is Daniel Jiménez  [Clear All Filters]
2006
M. Pericàs, Cristal, A., González, R., Jiménez, D., and Valero, M., A decoupled KILO-instruction processor, in The 12th International Symposium on High-Performance Computer Architecture (HPCA-12), Auctin, TX, United States, 2006, pp. 53–64.
2007
M. Pericàs, Cristal, A., Cazorla, F., González, R., Jiménez, D., and Valero, M., A Flexible Heterogeneous Multi-Core Architecture, in The 2007 International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Brasov, Romania, 2007, pp. 13–24.
2013
F. Y. Ahmadabadi, Jiménez, D., Álvarez, C., Etsion, Y., and Badia, R. M., Analysis of the Task Superscalar Architecture Hardware Design, 2013 International Conference on Computational Science. Elsevier, Barcelona, Spain, pp. 339–348, 2013.
C. González, Ishikawa, H., Hayashi, A., Jiménez, D., Álvarez, C., Kimura, K., and Kasahara, H., Automatic Design Exploration Framework for Multicores with Reconfigurable Accelerators, WRC 2013 : 7th HiPEAC Workshop on Reconfigurable Computing. Berlin, Germany, pp. 1–10, 2013.
F. Y. Ahmadabadi, Jiménez, D., Álvarez, C., Etsion, Y., and Badia, R. M., FPGA-Based Prototype of the Task Superscalar Architecture, WRC 2013 : 7th HiPEAC Workshop on Reconfigurable Computing. Belin, Germany, pp. 1–10, 2013.
A. Filgueras, Gil, E., Álvarez, C., Jiménez, D., Martorell, X., Langer, J., and Noguera, J., Heterogeneous tasking on SMP/FPGA SoCs: the case of OmpSs and the Zynq, 21st IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, Istambul, Turkey, pp. 290–291, 2013.