Publications

Export 24 results:
Sort by: Author Title Type [ Year (Desc)]
Filters: Author is Miquel Moreto  [Clear All Filters]
2012
Radojkovic, P., Carpenter, P., Moreto, M., Ramirez, A. & Cazorla, F. Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem . International Symposium on Microarchitecture (MICRO-45) (2012).
2010
Kedzierski, K., Moreto, M., Cazorla, F. & Valero, M. Adapting Cache Partitioning Algorithms to Real pseudo-LRU Replacement Policies. (2010).
Moreto, M., Cazorla, F., Ramirez, A., Sakellariou, R. & Valero, M. FlexDCP: a QoS framework for CMP architectures. ACM Operating Systems Review, Special Issue on the Interaction among the OS, Compilers, and Multicore Processors 43, 86-96 (2010).
Moreto, M., Paolieri, M., Abella, J., Quiñones, E., Cazorla, F. & Valero, M. Hard Real-Time Capable Multicore Processors for Space Applications. (2010).
Luque, C., Moreto, M., Cazorla, F., Gioiosa, R. & Valero, M. ITCA: Inter-Task Conflict-Aware CPU Accounting for CMPs. (2010).
Moreto, M., Cazorla, F., Sakellariou, R. & Valero, M. Load Balancing Using Dynamic Cache Allocation. (2010).
2009
Luque, C., Moreto, M., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. CPU accounting in CMP Processors. (2009).
Moreto, M., Cazorla, F., Ramirez, A., Sakellariou, R. & Valero, M. FlexDCP: a QoS framework for CMP architectures. ACM SIGOPS Operating System Review, Special Issue on the Interaction among the OS, Compilers, and Multicore Processors 43, 0163-5980 (2009).
Luque, C., Moreto, M., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. ITCA: Inter-Task Conflict-Aware CPU Accounting for CMPs. (2009).
Kedzierski, K., Moreto, M., Cazorla, F. & Valero, M. pseudo-LRU based Cache Partitioning Algorithms. (2009).
2008
Castillo, P.A., Mora, A.M., Merelo, J.J., Laredo, J.L., Moreto, M., Cazorla, F., Valero, M. & McKee, S.A. Architecture performance prediction using evolutionary artificial neural networks. (2008).
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. Dynamic Cache Partitioning Based on the MLP on Cache Misses. Transactions on HiPEAC 3, 1-21 (2008).
Castillo, P.A., Merelo, J.J., Moreto, M., Cazorla, F., Valero, M., Mora, A.M., Laredo, J.L. & McKee, S.A. Evolutionary system for prediction and optimization of hardware architecture performance. (2008).
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. MLP-aware dynamic cache partitioning. 2008 International Conference on High Performance Embedded Architectures & Compilers (HiPEAC 2008) 337-352 (2008).
Nesbit, K.J., Moreto, M., Cazorla, F., Ramirez, A., Valero, M. & Smith, J.E. Multicore Resource Management. IEEE Micro 28, 6-16 (2008).
Nesbit, K.J., Moreto, M., Cazorla, F., Ramirez, A., Valero, M. & Smith, J.E. Virtual Private Machines: Hardware/Software Interactions in the Multicore Era. (2008).
2007
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. Explaining Dynamic Cache Partitioning Speed Ups. IEEE Computer Architecture Letters 6, 1-12 (2007).
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. MLP-aware dynamic cache partitioning. International Conference on Parallel Architectures and Compilation Techniques (PACT) 418-418 (2007).
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. Online Prediction of Applications Cache Utility. International Symposium on Systems, Architectures, MOdeling and Simulation (SAMOS) 169-177 (2007).
Moreto, M., Cazorla, F., Ramirez, A. & Valero, M. Online Prediction of Throughput for Different Cache Sizes. XVIII Jornadas de Paralelismo (2007).
2006
Moreto, M., Ramirez, A. & Valero, M. Reducing Simulation Time. 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06) (2006).
2005
Moreto, M., Martínez, C., Beivide, R., Vallejo, E. & Valero, M. Hierarchical Gaussian Topologies. (2005).
Moreto, M., Martínez, C., Vallejo, E., Beivide, M. & Valero, M. Hierarchical Topologies for Large-Scale Two-Level Networks. (2005).
2001
Torras-Llort, M., Torrents, D., Soriano-Garcia, J.F., Gelpí, J.L., Estevez, R., Ferrer, R., Palacín, M. & Moreto, M. Sequential amino acid exchange across b(0,+)-like system in chicken brush border jejunum. (2001).