Publications

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2010
H. Munk, Ayguadé, E., Bastoul, C., Carpenter, P., Chamski, Z., Cohen, A., Cornero, M., Dumont, P., Duranton, M., Fellahi, M., Ferrer, R., Ladelsky, R., Lindwer, M., and Martorell, X., ACOTES Project: Advanced Compiler Technologies for Embedded Streaming Harm Munk, International Journal of Parallel Programming, vol. 39, no. 3. Springer-Verlag, pp. 397-450, 2010.
R. Ferrer, Beltran, V., González, M., Martorell, X., and Ayguadé, E., Analysis of Task Offloading for Accelerators. Proc. of the 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25- 27, 2010, 2010.
N. Vujic, González, M., Martorell, X., and Ayguadé, E., Automatic Prefetch and Modulo Scheduling Transformations for the Cell BE Architecture. IEEE Transactions on Parallel and Distributed Systems, vol 21(4), pp.494-505, 2010.
R. Bertran, González, M., Martorell, X., Navarro, N., and Ayguadé, E., Decomposable and Responsive Power Models for Multicore Processors using Performance Counters. Proc. of the 24th ACM Int. Conf. on Supercomputing, pp.147-158, 2010.
N. Vujic, González, M., Ayguadé, E., Martorell, X., Ramirez, A., and Cabarcas, F., DMA++: On the Fly Data Realignment for On-Chip Memories, 16th IEEE International Symposium on High-Performance Computer Architecture. Bangalore (India), 2010.
E. Ayguadé, Badia, R. M., Bellens, P., Cabrera, D., Duran, A., González, M., Igual, F., Jiménez-González, D., Labarta, J., Martinell, L., Martorell, X., Mayo, R., Pérez, J. M., and Ju, H. B., Extending OpenMP to Survive the Heterogeneous Multi-core Era. International Journal of Parallel Programming, vol. 38, nos: 5-6, pages: 440-459, 2010.
D. A. Jiménez, Sánchez, R., Álvarez, C., Morillo-Pozo, J., Cabrera, D., Martorell, X., and Ayguadé, E., GPFPGA: entorno para la generación automática de códigos HDL portables entre FPGAs. X Jornadas de Computación Reconfigurable y Aplicaciones (JCRA'10), pp. 19-26, 2010.
R. Ferrer, Duran, A., Martorell, X., and Ayguadé, E., Harmonizing serial optimizations with OpenMP. 15th Workshop on Compilers for Parallel Computing (CPC-2010), 2010.
R. Bertran, González, M., Martorell, X., Navarro, N., and Ayguadé, E., Local Memory Design Space Exploration for High-Performance Computing. The Computer Journal, vol. 53(3), 2010.
R. M. Badia, Ferrer, R., Planas, J., Bellens, P., Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Optimizing the Exploitation of Multicore Processors and GPUs with OpenMP and OpenCL. on proceedings of the The 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC2010), 2010.
R. Ferrer, Bellens, P., Yeom, J., Schneider, S., Koukos, K., Alvanos, M., Beltran, V., González, M., Martorell, X., Badia, R. M., Nikolopoulos, D. S., Bilas, A., and Ayguadé, E., Parallel Programming Models for Heterogeneous Multicore Architectures. IEEE Micro, vol. 30, no. 5, 2010.
J. Bueno, Martorell, X., Costa, J., Cortes, T., Ayguadé, E., Zhang, G., Barton, C., and Silvera, R., Reducing Data Access Latency in SDSM Systems using Runtime Optimizations, 19th Annual International Conference hosted by the Centre for Advanced Studies & Research (CASCON 2010). ACM Digital library, Toronto, ON, Canada, pp. 160-173, 2010.
J. Costa, Cortes, T., Martorell, X., Bueno-Hedo, J., and Ayguadé, E., Transient Congestion Avoidance in Software Distributed Shared Memory Systems. 11th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT-10), pp. 357-364, 2010.
2009
R. Ferrer, Beltran, V., González, M., Martorell, X., and Ayguadé, E., Achieving High Memory Performance from Heterogeneous Architectures with the SARC Programming Model. 10th Workshop on Memory Performance: Dealing with Applications, systems, and architecture (MEDEA 2009), 2009.
N. Vujic, Álvarez, L., González, M., Martorell, X., and Ayguadé, E., Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories. Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 2009.
A. Duran, Teruel, X., Ferrer, R., Martorell, X., and Ayguadé, E., Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP. Proc. of the 2009 International Conference on Parallel Processing (ICPP 2009), 2009.
C. González, Jiménez-González, D., Martorell, X., Álvarez, C., and Gaydadjiev, G. N., Fast Evaluation Methodology for Automatic Custom Hardware Prototyping. 4th Workshop on Architectural Research Prototyping (WARP '09), 2009.
C. González, Jiménez, D. A., Martorell, X., Álvarez, C., and Gaydadjiev, G. N., Metodología para la generación y evaluación automática de hardware específico (in Spanish). XX Jornadas de Paralelismo, pp.295-300, 2009.
D. Cabrera, Martorell, X., Gaydadjiev, G. N., Ayguadé, E., and Jiménez-González, D., OpenMP Extensions for FPGA Accelerators. Proc. of the 9th Int. Conf. on Systems, Architectures, Modeling, and Simulation (SAMOS '09), pp.17-24, 2009.
X. Teruel, Barton, C., Duran, A., Martorell, X., Ayguadé, E., Unnikrishnan, P., Zhang, G., and Silvera, R., OpenMP Tasking Analysis for Programmers. Proc. of the CAS Conference 2009, 2009.
E. Ayguadé, Badia, R. M., Cabrera, D., Duran, A., González, M., Igual, F., Jiménez, D. A., Labarta, J., Martorell, X., Mayo, R., Pérez, J. M., and Quintana-Ortí, E. S., A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures. Proceedings of the International Workshop on OpenMP (IWOMP 2009), 2009.
E. Ayguadé, Badia, R. M., Cabrera, D., Duran, A., González, M., Igual, F., Jiménez, D. A., Labarta, J., Martorell, X., Mayo, R., Pérez, J. M., and Quintana-Ortí, E. S., A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures. Proc. of the 5th International Workshop on OpenMP, 2009.
R. Ferrer, Duran, A., Martorell, X., and Ayguadé, E., Unrolling Loops Containing Task Parallelism. Proceedings of the 22nd International Workshop on Languages and Compilers for Parallel Computing, 2009.
2008
N. Vujic, González, M., Martorell, X., and Ayguadé, E., Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture. Proceedings of the 21st Annual Workshop Languages and Compilers for Parallel Computing (LCPC'08), 2008.
R. Ferrer, González, M., Silla, F., Martorell, X., and Ayguadé, E., Evaluation of Memory Performance on the Cell BE with the SARC Programming Model. Proceedings of the 9th Workshop on Memory Performance: Dealing with Applications, systems, and architecture (MEDEA'08), 2008.
M. González, Vujic, N., Martorell, X., Ayguadé, E., Eichenberger, A. E., Chen, T., Sura, Z., Zhang, T., O'Brien, K., and O'Brien, K., Hybrid Access-Specific Software Cache Techniques for the Cell BE Architecture. Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques (PACT'08), 2008.
X. Teruel, Unnikrishnan, P., Martorell, X., Ayguadé, E., Silvera, R., Zhang, G., and Tiotto, E., OpenMP Tasks in IBM XL Compilers. Proceedings of CASCON 2008, 2008.
M. Álvarez, Ramirez, A., Martorell, X., Ayguadé, E., and Valero, M., Scalability of Macroblock-level Parallelism for H.264 Decoding, Advanced Computer Architecture and Compilation for Embedded Systems. ACACES 2008, Poster. pp. 59-62, 2008.
2007
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., CellSim: A Cell Processor Simulation Infrastructure, 2007 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07). pp. 279-282, 2007.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator, XVIII Jornadas de Paralelismo de Zaragoza. Zaragoza (Spain), pp. 181-188, 2007.
K. D. Bosschere, Luk, W., Martorell, X., Navarro, N., O'Boyle, M., Pnevmatikatos, D., Ramirez, A., Sainrat, P., Seznec, A., Stenström, P., and Temam, O., High Performance Embedded Architectures and Compilation Roadmap. Transactions on HiPEAC Vol 1, Lecture Notes in Computer Science 4050, 2007.
A. Rico, Cabarcas, F., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., Implementation and Validation of a Cell Simulator using UNISIM, 3rd HiPEAC Industrial Workshop. 2007.
J. Balart, González, M., Martorell, X., Ayguadé, E., Sura, Z., Chen, T., Zhang, T., O'Brien, K., and O'Brien, K., A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor. Proceedings of the 20th International Workshop on Languages and Compilers for Parallel Computing, 2007.
D. Jiménez-González, Martorell, X., and Ramirez, A., Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2007). pp. 210-219, 2007.
P. Carpenter, Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A Streaming Machine Description and Programming Model, 7th Intl. Workshop on Embedded Computer Systems: Architectures, MOdeling, and Simulation (SAMOS VII). Springer-Verlag, pp. 107-116, 2007.
X. Teruel, Martorell, X., Duran, A., Ferrer, R., and Ayguadé, E., Support for OpenMP Tasks in Nanos v4. Proceedsings of CASCON 2007, 2007.
M. Milovanovic, Ferrer, R., Unsal, O., Cristal, A., Martorell, X., Ayguadé, E., Labarta, J., and Valero, M., Transactional Memory and OpenMP, International Workshop on OpenMP (IWOMP-2007). Springer-Verlag, Beijing, China, pp. 37–53, 2007.
2006
D. Ródenas, Martorell, X., Ayguadé, E., Labarta, J., Almasi, G., Cascaval, C., Castaños, J., and Moreira, J., Exploiting Multilevel Parallelism using OpenMP on a Massive Multithreaded Architecture. Journal of Embedded Computing, 2006.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A module based Cell processor simulator, 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06). 2006.
A. Duran, Ferrer, R., Costa, J., González, M., Martorell, X., Ayguadé, E., and Labarta, J., A Proposal for Error Handling in OpenMP. International Workshop on OpenMP (IWOMP 2006), 2006.
J. Costa, Cortes, T., Martorell, X., Ayguadé, E., and Labarta, J., Running OpenMP application efficiently on an everything-shared SDSM. Journal on Parallel and Distributed systems (JPDC), 2006.
J. Balart, González, M., Martorell, X., Ayguadé, E., and Labarta, J., Runtime Address Space Computation for SDSM Systems. The 19th Int. Workshop on Languages and Compilers for Parallel Computing (LCPC 2006), 2006.
X. Martorell, González, M., Duran, A., Balart, J., Ferrer, R., Ayguadé, E., and Labarta, J., Techniques Supporting threadprivate in OpenMP. 11th Int. Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS 2006), 2006.
2005
A. Duran, González, M., Corbalán, J., Martorell, X., Ayguadé, E., Labarta, J., and Silvera, R., Automatic Thread Distribution for Nested Parallelism in OpenMP. 19th ACM International Conference on Supercomputing, 2005.
X. Martorell, Smeds, N., Walkup, R., Brunheroto, J. R., Almasi, G., Gunnels, J. A., DeRose, L., Labarta, J., Escalé, F., Giménez, J., Servat, H., and Moreira, J., Blue Gene/L performance tools. IBM Journal of Research and Development, 2005.
G. Almasi, Archer, C., Castaños, J., Gunnels, J. A., Erway, C. C., Heidelberger, P., Martorell, X., Moreira, J., Pinnow, K., Ratterman, J., Steinmacher-Burow, B. D., Gropp, W., and Bria, Design and Implementation of message-passing services for the Blue Gene/L supercomputer. IBM Journal of Research and Development, 2005.
E. Ayguadé, González, M., Martorell, X., and Jost, G., Employing nested OpenMP for the parallelization of multi-zone computational fluid dynamics applications. Journal of Parallel and Distributed Computing, 2005.
J. Balart, Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Experiences parallelizing a web server with OpenMP. XVI Jornadas de Paralelismo, 2005.
J. Balart, Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Experiences parallelizing a Web Server with OpenMP. First International Workshop on OpenMP (IWOMP 2005), 2005.
G. Almasi, Archer, C., Erway, C. C., Heidelberger, P., Martorell, X., Moreira, J., Steinmacher-Burow, B. D., and Zheng, Y., Optimization of MPI Collective Communication on Blue Gene/L Systems. 19th ACM International Conference on Supercomputing, 2005.

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