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Vujic, N. et al. DMA++: On the Fly Data Realignment for On-Chip Memories. 16th IEEE International Symposium on High-Performance Computer Architecture (2010).
Ayguadé, E. et al. Extending OpenMP to Survive the Heterogeneous Multi-core Era. (2010).
Jiménez, D. A. et al. GPFPGA: entorno para la generación automática de códigos HDL portables entre FPGAs. (2010). at <>
Ferrer, R., Duran, A., Martorell, X. & Ayguadé, E. Harmonizing serial optimizations with OpenMP. (2010). at <>
Bertran, R., González, M., Martorell, X., Navarro, N. & Ayguadé, E. Local Memory Design Space Exploration for High-Performance Computing. (2010). at <>
Badia, R. M. et al. Optimizing the Exploitation of Multicore Processors and GPUs with OpenMP and OpenCL. (2010).
Ferrer, R. et al. Parallel Programming Models for Heterogeneous Multicore Architectures. (2010).
Bueno, J. et al. Reducing Data Access Latency in SDSM Systems using Runtime Optimizations. 19th Annual International Conference hosted by the Centre for Advanced Studies & Research (CASCON 2010) 160-173 (2010). doi:10.1145/1923947.1923965
Costa, J., Cortes, T., Martorell, X., Bueno-Hedo, J. & Ayguadé, E. Transient Congestion Avoidance in Software Distributed Shared Memory Systems. (2010). at <>
Ferrer, R., Beltran, V., González, M., Martorell, X. & Ayguadé, E. Achieving High Memory Performance from Heterogeneous Architectures with the SARC Programming Model. (2009). at <>
Vujic, N., Álvarez, L., González, M., Martorell, X. & Ayguadé, E. Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories. (2009). at <>
Duran, A., Teruel, X., Ferrer, R., Martorell, X. & Ayguadé, E. Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP. (2009). at <>
González, C., Jiménez-González, D., Martorell, X., Álvarez, C. & Gaydadjiev, G. N. Fast Evaluation Methodology for Automatic Custom Hardware Prototyping. (2009). at <>
González, C., Jiménez, D. A., Martorell, X., Álvarez, C. & Gaydadjiev, G. N. Metodología para la generación y evaluación automática de hardware específico (in Spanish). (2009).
Cabrera, D., Martorell, X., Gaydadjiev, G. N., Ayguadé, E. & Jiménez-González, D. OpenMP Extensions for FPGA Accelerators. (2009). at <>
Teruel, X. et al. OpenMP Tasking Analysis for Programmers. (2009). at <>
Ayguadé, E. et al. A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures. (2009). at <>
Ayguadé, E. et al. A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures. (2009).
Ferrer, R., Duran, A., Martorell, X. & Ayguadé, E. Unrolling Loops Containing Task Parallelism. (2009). at <>
Cabarcas, F. et al. CellSim: A Cell Processor Simulation Infrastructure. 2007 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07) 279-282 (2007).
Cabarcas, F. et al. CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator. XVIII Jornadas de Paralelismo de Zaragoza 181-188 (2007).
Bosschere, K. D. et al. High Performance Embedded Architectures and Compilation Roadmap. (2007).
Rico, A. et al. Implementation and Validation of a Cell Simulator using UNISIM. 3rd HiPEAC Industrial Workshop (2007).
Balart, J. et al. A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor. (2007). at <>
Jiménez-González, D., Martorell, X. & Ramirez, A. Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2007) 210-219 (2007).
Carpenter, P., Ródenas, D., Martorell, X., Ramirez, A. & Ayguadé, E. A Streaming Machine Description and Programming Model. 7th Intl. Workshop on Embedded Computer Systems: Architectures, MOdeling, and Simulation (SAMOS VII) 107-116 (2007).
Teruel, X., Martorell, X., Duran, A., Ferrer, R. & Ayguadé, E. Support for OpenMP Tasks in Nanos v4. (2007). at <>
Milovanovic, M. et al. Transactional Memory and OpenMP. International Workshop on OpenMP (IWOMP-2007) 37–53 (Springer-Verlag, 2007). at <>