Export 14 results:
Author [ Title(Desc)] Type Year
Filters: Author is Mauricio Araya-Polo  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
de la Cruz, R. & Araya-Polo, M. Algorithm 942: Semi-stencil. ACM Transactions On Mathematical Software 40, (2013).
Araya-Polo, M. et al. Assessing Accelerator-based HPC Reverse Time Migration. Transactions on Parallel and Distributed Systems, Special Issue on Accelerators 22(1), 147-162 (2011).
Ortigosa, F. et al. Benchmarking 3D RTM on HPC Platforms. VII Congreso de Exploración y Desarrollo de Hidrocarburos (2008).
Cabezas, J., Araya-Polo, M., Gelado, I., Navarro, N. & Cela, J. M. High-Performance Reverse Time Migration on GPU. XXVIII International Conference of the Chilean Computer Society - XIII Workshop on Parallel and Distributed Systems (WSDP) (2009).
Araya-Polo, M. et al. High-Performance Seismic Acoustic Imaging by Reverse-Time Migration on the Cell/B.E. Architecture. ISCA2008 - WCSA2008 / SCIENTIFIC PROGRAMMING SPECIAL ISSUE ON HIGH PERFORMANCE COMPUTING ON CELL B.E. PROCESSORS (2008).
de la Cruz, R., Araya-Polo, M. & Cela, J. M. Introducing the Semi-stencil Algorithm. Parallel Processing and Applied Mathematics 8th International Conference, PPAM 2009, Wroclaw, Poland, September 13-16. (2009). doi:
de la Cruz, R. & Araya-Polo, M. Modeling Stencil Code Optimizations. Performance Optimization for Stencils and Meshes Workshop, SIAM Conference on Parallel Processing for Scientific Computing (2014).
de la Cruz, R. & Araya-Polo, M. Modeling Stencil Computations on Modern HPC Architectures. 5th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS14) held as part of SC14 (2014).
de la Cruz, R. & Araya-Polo, M. Towards a Multi-Level Cache Performance Model for 3D Stencil Computation. Proceedings of the International Conference on Computational Science, ICCS 2011 4, 2146-2155 (2011).