Publications

Export 186 results:
Author Title Type [ Year(Desc)]
Filters: Author is Eduard Ayguadé  [Clear All Filters]
2001
J. Guitart, Martorell, X., Torres, J., and Ayguadé, E., Efficient Execution of Parallel Java Applications, 3rd Annual Workshop on Java for High Performance Computing. Sorrento, Italy, pp. 31-35, 2001.
J. Guitart, Torres, J., Ayguadé, E., and Bull, M., Performance Analysis of Parallel Java Applications on Shared-memory Systems, 30th International Conference on Parallel Processing (ICPP'01). Valencia, Spain, pp. 357-364, 2001.
J. Oliver, Guitart, J., Ayguadé, E., Navarro, N., and Torres, J., Strategies for Efficient Exploitation of Loop-Level Parallelism in Java Concurrency and Computation, Concurrency and Computation: Practice and Experience, vol. Vol. 13 (8-9). pp. 663-680, 2001.
2004
D. Ortega, Valero, M., and Ayguadé, E., Dynamic Memory Instruction Bypassing. IJPP, International Journal on Parallel Processing . Plenun Published Corporation. Special issue on selected papers from ICS-2003, 2004.
V. Beltran, Carrera, D., Torres, J., and Ayguadé, E., Evaluating the Scalability of Java Event-Driven Web Servers. 2004 International Conference on Parallel Processing (ICPP'04), 2004.
M. Pericas, Ayguadé, E., Zalamea, J., Llosa, J., and Valero, M., High Performance and Low Power VLIW for Numerical Applications. IJHPCN. International Journal of High Performance Computing and Networking, 2004.
M. Pericas, Ayguadé, E., Zalamea, J., Llosa, J., and Valero, M., Performance and Power Evaluation of Clustered VLIW Processors with Functional Units. Lecture Notes on Computer Science, 2004.
V. Beltran, Guitart, J., Carrera, D., Torres, J., Ayguadé, E., and Labarta, J., Performance Impact of Using SSL on Dynamic Web Applications, XV Jornadas de Paralelismo. Almeria, Spain, pp. 471-476, 2004.
J. Zalamea, Llosa, J., Ayguadé, E., and Valero, M., Register-constrained Modulo Scheduling. IEEE Transactions on Parallel and Distributed Systems, 2004.
J. Costa, Cortes, T., Martorell, X., Ayguadé, E., and Labarta, J., Running OpenMP Applications Efficiently on an Everything-shared SDSM. 18th International Parallel and Distributed Processing Symposium (IPDPS-2004), 2004.
J. Zalamea, Llosa, J., Ayguadé, E., and Valero, M., Software and Hardware Techniques to Optimize Register File Utilization in VLIW. International Journal of Parallel Programming, 2004.
2005
A. Duran, González, M., Corbalán, J., Martorell, X., Ayguadé, E., Labarta, J., and Silvera, R., Automatic Thread Distribution for Nested Parallelism in OpenMP. 19th ACM International Conference on Supercomputing, 2005.
J. Guitart, Beltran, V., Carrera, D., Torres, J., and Ayguadé, E., Characterizing Secure Dynamic Web Applications Scalability, 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05). Denver, Colorado, USA, 2005.
E. Ayguadé, González, M., Martorell, X., and Jost, G., Employing nested OpenMP for the parallelization of multi-zone computational fluid dynamics applications. Journal of Parallel and Distributed Computing, 2005.
J. Balart, Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Experiences parallelizing a web server with OpenMP. XVI Jornadas de Paralelismo, 2005.
J. Balart, Duran, A., González, M., Martorell, X., Ayguadé, E., and Labarta, J., Experiences parallelizing a Web Server with OpenMP. First International Workshop on OpenMP (IWOMP 2005), 2005.
D. Carrera, Beltran, V., Torres, J., and Ayguadé, E., A Hybrid Web Server Architecture for e-Commerce Applications. The 11th International Conference on Parallel and Distributed Systems (ICPADS 2005), 2005.
V. Beltran, Carrera, D., Guitart, J., Torres, J., and Ayguadé, E., A Hybrid Web Server Architecture for Secure e-Business Web Applications, Lecture Notes on Computer Science (LNCS), 1st International Conference on High Performance Computing and Communications (HPCC 05), vol. Vol. 3726. Sorrento, Italy, pp. 366-377, 2005.
D. Ródenas, Martorell, X., Ayguadé, E., Labarta, J., Almasi, G., Cascaval, C., Castaños, J., and Moreira, J., Optimizing NANOS OpenMP for the IBM Cyclops Multithreaded Architecture. 19th International Parallel and Distributed Processing Symposium (IPDPS '05), 2005.
M. Pericas, Ayguadé, E., Zalamea, J., Llosa, J., and Valero, M., Power and Performace Evaluation of Widened and Clustered VLIW Cores. LNCS, 2005.
J. Guitart, Beltran, V., Carrera, D., Torres, J., and Ayguadé, E., Session-Based Adaptative Overload Control for Secure Dynamic Web Application, 34th International Conference on Parallel Processing (ICPP-05). Oslo, Norway, pp. 341-349, 2005.
R. Nou, Guitart, J., Beltran, V., Carrera, D., Montero, L., Torres, J., and Ayguadé, E., Simulating complex systems with a low-detail model, XVI Jornadas de Paralelismo. Granada, Spain, pp. 301-308, 2005.
J. Guitart, Carrera, D., Torres, J., Ayguadé, E., and Labarta, J., Tuning Dynamic Web Applications using Fine-Grain Analysis, 13th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'05). Lugano, Switzerland, pp. 84-91, 2005.
D. Carrera, García, D., Torres, J., Ayguadé, E., and Labarta, J., WAS Control Center: An Autonomic Performance-Triggered Tracing Environment for WebSphere. 13th Euromicro Conference on Parallel, Distributed and Network-based Processing, 2005.
2006
D. Ródenas, Martorell, X., Ayguadé, E., Labarta, J., Almasi, G., Cascaval, C., Castaños, J., and Moreira, J., Exploiting Multilevel Parallelism using OpenMP on a Massive Multithreaded Architecture. Journal of Embedded Computing, 2006.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A module based Cell processor simulator, 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06). 2006.
D. Carrera, Guitart, J., Beltran, V., Torres, J., and Ayguadé, E., Performance Impact of the Grid Middleware, in Engineering the Grid: Status and Perspective, American Scientific Publishers, 2006, pp. 235-249.
T. Morad, Weiser, U., Kolodny, A., Valero, M., and Ayguadé, E., Performance, Power Efficiency and Scalability of Asymmetric Cluster Chip Multiprocessors. IEEE CAL, Computer Architecture Letters, 2006.
A. Duran, Ferrer, R., Costa, J., González, M., Martorell, X., Ayguadé, E., and Labarta, J., A Proposal for Error Handling in OpenMP. International Workshop on OpenMP (IWOMP 2006), 2006.
J. Costa, Cortes, T., Martorell, X., Ayguadé, E., and Labarta, J., Running OpenMP application efficiently on an everything-shared SDSM. Journal on Parallel and Distributed systems (JPDC), 2006.
J. Balart, González, M., Martorell, X., Ayguadé, E., and Labarta, J., Runtime Address Space Computation for SDSM Systems. The 19th Int. Workshop on Languages and Compilers for Parallel Computing (LCPC 2006), 2006.
X. Martorell, González, M., Duran, A., Balart, J., Ferrer, R., Ayguadé, E., and Labarta, J., Techniques Supporting threadprivate in OpenMP. 11th Int. Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS 2006), 2006.
2007
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., CellSim: A Cell Processor Simulation Infrastructure, 2007 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07). pp. 279-282, 2007.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator, XVIII Jornadas de Paralelismo de Zaragoza. Zaragoza (Spain), pp. 181-188, 2007.
J. Guitart, Carrera, D., Beltran, V., Torres, J., and Ayguadé, E., Designing an Overload Control Strategy for Secure e-Commerce Applications, Computer Networks, vol. Vol. 51 (15). pp. 4492-4510, 2007.
E. Ayguadé, Duran, A., Hoeflinger, J., Massaioli, F., and Teruel, X., An Experimental Evaluation of the New OpenMP Tasking Model. Proceedings of the 20th International Workshop on Languages and Compilers for Parallel Computing (LCPC), 2007.
A. Rico, Cabarcas, F., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., Implementation and Validation of a Cell Simulator using UNISIM, 3rd HiPEAC Industrial Workshop. 2007.
V. Beltran, Torres, J., and Ayguadé, E., Improving Disk Bandwidth-Bound Applications Through Main Memory Compression. MEDEA Workshop, 2007.
F. Zyulkyarov, Unsal, O., Cristal, A., Milovanovic, M., Ayguadé, E., and Valero, M., Memory Management for Transaction Processing Core in Heterogeneous Chip Multiprocessors, in Workshop on Operating System Support for Heterogeneous Multicore Architectures, Brasov, Romania, 2007.
M. Milovanovic, Ferrer, R., Gajinov, V., Unsal, O., Cristal, A., Ayguadé, E., and Valero, M., Multithreaded software transactional memory and OpenMP, in 8th MEDEA Workshop Memory Performance: Dealing With Applications, Systems And Architecture (MEDEA 2007), Brasov, Romania, 2007, pp. 81–88.
J. Balart, González, M., Martorell, X., Ayguadé, E., Sura, Z., Chen, T., Zhang, T., O'Brien, K., and O'Brien, K., A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor. Proceedings of the 20th International Workshop on Languages and Compilers for Parallel Computing, 2007.
E. Ayguadé, Copty, N., Duran, A., Hoeflinger, J., Lin, Y., Massaioli, F., Su, E., Unnikrishnan, P., and Zhang, G., A proposal for task parallelism in OpenMP. Proceedings of the 3rd International Workshop on OpenMP (IWOMP'07), 2007.

Pages