Publications

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International Conferences
L. Álvarez, Moreto, M., Casas, M., Castillo, E., Martorell, X., Labarta, J., Ayguadé, E., and Valero, M., Runtime-Guided Management of Scratchpad Memories in Multicore Architectures, 2015 International Conference on Parallel Architecture and Compilation (PACT) . pp. 379-391, 2015.
M. Casas, Moreto, M., Álvarez, L., Castillo, E., Chasapis, D., Hayes, T., Jaulmes, L., Palomar, O., Ünsal, O. S., Cristal, A., Ayguadé, E., Labarta, J., and Valero, M., Runtime-Aware Architectures, Euro-Par. 2015.
L. Álvarez, Vilanova, L., González, M., Martorell, X., Navarro, N., and Ayguadé, E., Hardware-software coherence protocol for the coexistence of caches and local memories, Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society Press, Los Alamitos, CA, USA, pp. 89:1–89:11, 2012.
N. Vujic, Álvarez, L., González, M., Martorell, X., and Ayguadé, E., DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories, Proceedings of the 9th conference on Computing Frontiers (CF). ACM, New York, NY, USA, pp. 113–122, 2012.
L. Álvarez, Bertran, R., González, M., Martorell, X., Navarro, N., and Ayguadé, E., Design space exploration for aggressive core replication schemes in CMPs, Proceedings of the 20th international symposium on High performance distributed computing. ACM, New York, NY, USA, pp. 269–270, 2011.
L. Álvarez, Vilanova, L., Moreto, M., Casas, M., González, M., Martorell, X., Navarro, N., Ayguadé, E., and Valero, M., Coherence Protocol for Transparent Management of Scratchpad Memories in Shared Memory Manycore Architectures, Proceedings of the 42nd International Symposium on Computer Architecture (ISCA). ACM, New York, NY, USA, pp. 720-732, 2015.