Publications

Export 7 results:
Sort by: Author Title Type [ Year (Asc)]
Filters: Author is Nikola Vujic  [Clear All Filters]
2008
Vujic, N., González, M., Martorell, X. & Ayguadé, E. Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture. (2008).at <http://www-user.cs.ualberta.ca/conferences/lcpc08/>
González, M., Vujic, N., Martorell, X., Ayguadé, E., Eichenberger, A.E., Chen, T., Sura, Z., Zhang, T., O'Brien, K. & O'Brien, K. Hybrid Access-Specific Software Cache Techniques for the Cell BE Architecture. (2008).at <http://www.eecg.toronto.edu/pact/>
2009
Vujic, N., Álvarez, L., González, M., Martorell, X. & Ayguadé, E. Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Local Memories. (2009).at <http://nanos.ac.upc.edu/content/adaptive-and-speculative-memory-consistency-support-multi-core-architectures-chip-local-memo>
2010
Vujic, N., González, M., Martorell, X. & Ayguadé, E. Automatic Prefetch and Modulo Scheduling Transformations for the Cell BE Architecture. (2010).at <http://doi.ieeecomputersociety.org/10.1109/TPDS.2009.97>
Vujic, N., González, M., Ayguadé, E., Martorell, X., Ramirez, A. & Cabarcas, F. DMA++: On the Fly Data Realignment for On-Chip Memories. 16th IEEE International Symposium on High-Performance Computer Architecture (2010).
2012
Vujic, N., Álvarez, L., González, M., Martorell, X. & Ayguadé, E. DMA-circular: an enhanced high level programmable DMA controller for optimized management of on-chip local memories. Proceedings of the 9th conference on Computing Frontiers 113–122 (2012).doi:10.1145/2212908.2212925
Vujic, N. Software Caching Techniques and Hardware Optimizations for On-Chip Local Memories. (2012).