Publications

Export 20 results:
[ Author(Asc)] Title Type Year
Filters: Author is Adrián Cristal  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
C
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., A Case for Resource-conscious Out-of-order Processors, Computer Architecture Letters, vol. 2, 2003.
A. Cristal, Llosa, J., Valero, M., and Ortega, D., Future ILP processors, International Journal of High Performance Computing and Networking, vol. 2, pp. 1–10, 2004.
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., A case for resource-conscious out-of-order processors: towards kilo-instruction in-flight processors, ACM SIGARCH Computer Architecture News, vol. 32, pp. 3–10, 2004.
A. Cristal, Santana, O. J., Valero, M., and Martínez, J. F., Toward Kilo-instruction Processors, ACM Transactions on Architecture and Code Optimization, vol. 1, pp. 368–396, 2004.
A. Cristal, Santana, O. J., Cazorla, F., Galluzzi, M., Ramírez, T., Pericàs, M., and Valero, M., Kilo-instruction Processors: Overcoming the Memory Wall, IEEE Micro, vol. 25. pp. 48–57, 2005.
A. Cristal and Valero, M., ROBs Virtuales utilizando checkpoints, in XIII Jornadas de Paralelismo, Lleida, Spain, 2002.
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., Optimal Use of Registers in Aggressive Superscalar Processors, in XIV Jornadas de Paralelismo, Leganés, Spain, 2003, pp. 553–558.
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., A Case for Resource Conscious Out-of-Order Processor, in MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture (MEDEA 2003), New Orleans, LA, United States, 2003.
A. Cristal, Ortega, D., Llosa, J., and Valero, M., Kilo-instruction Processors, in 5th International Symposium on High Performance Computing (ISHPC-V), Tokio, Japan, 2003, pp. 10–25.
A. Cristal, Ortega, D., Llosa, J., and Valero, M., Out-of-Order Commit Processors, in 10th International Symposium on High Performance Computer Architecture (HPCA-10), Madrid, Spain, 2004, pp. 48–59.
A. Cristal, Santana, O. J., and Valero, M., A Comprehensive Description of Kilo-Instruction Processors, in 5o Congreso Nacional de Computación, Mexico City, Mexico, 2004, pp. 144–154.
A. Cristal, Santana, O. J., and Valero, M., Maintaining Thousands of In-Flight Instructions, in 10th International Euro-Par 2004 Conference, Pisa, Italy, 2004, pp. 9–20.
A. Cristal, Síntesis de Redes de Petri. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 1996.
A. Cristal, Un simulador de un procesador similar al MIPS R10000. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 1997.
A. Cristal, Valero, M., González, A., and Llosa, J., Large Virtual ROBs by Processor Checkpointing. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 2002.
A. Cristal, Martínez, J. F., Ortega, D., Llosa, J., and Valero, M., Out-of-Order Commit Processors. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 2003.
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., A Case for Resource-conscious Out-of-order Processors. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 2003.
A. Cristal, Martínez, J. F., Llosa, J., and Valero, M., Ephemeral Registers with Multicheckpointing. Computer Architecture Department, Universitat Politècnica de Catalunya (UPC), 2003.
A. Cristal, Kilo Instruction Processors, Universitat Politècnica de Catalunya (UPC), 2006.
A. Cristal, Unsal, O., Yalcin, G., Fetzer, C., Wamhoff, J. - T., Felber, P., Harmanci, D., and Sobe, A., Leveraging Transactional Memory for Energy-efficient Computing below Safe Operation Margins, 8th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2013). Texas, United States, 2013.