Publications

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2012
Luque, C., Moretó, M., Cazorla, F.J., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. CPU Accounting for Multicore Processors. IEEE Transactions on Computers 61, 251–264 (2012).
Jiménez, V., Gioiosa, R., Cazorla, F.J., Buyuktosunoglu, A., Bose, P. & O'Connell, F.P. Making Data Prefetch Smarter: Adaptive Prefetching on POWER7. 21st International Conference on Parallel Architectures and Compilation Techniques (PACT-2012) 137–146 (2012).
Morari, A., Boneti, C., Cazorla, F.J., Gioiosa, R., Cher, C.-Y., Buyuktosunoglu, A., Bose, P. & Valero, M. SMT Malleability in IBM POWER5 and POWER6 Processors. IEEE Transactions on Computers 00, (2012).
Bertran, R., Buyuktosunoglu, A., Gupta, M.S., González, M. & Bose, P. Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks. International Symposium on Microarchitecture (2012).at <http://www.microsymposia.org/micro45/>
2011
Jimenez, V., Cazorla, F., Gioiosa, R., Kursun, E., Isci, C., Buyuktosunoglu, A., Bose, P. & Valero, M. A Case for Energy-Aware Accounting and Billing in Large-Scale Computing Facilities Cost Metrics and Design Implications. IEEE Micro (2011).
Jimenez, V., Cazorla, F., Gioiosa, R., Valero, M., Boneti, C., Kursun, E., Cher, C., Isci, C., Buyuktosunoglu, A. & Bose, P. Characterizing Power and Temperature Behavior of POWER6-Based System. (invited paper). IEEE Journal of Emerging and Selected Topics in Circuits and Systems (2011).
2010
Jiménez, V.J., Cazorla, F., Gioiosa, R., Kursun, E., Isci, C., Buyuktosunoglu, A. & Valero, M. A Case for Energy Aware Accounting in Large Scale Computing Facilities: Cost Metrics and Implications for Processor Design. (2010).
Kedzierski, K., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. Power and Performance Aware Reconfigurable Cache for CMPs. (2010).
Jiménez, V.J., Boneti, C., Cazorla, F., Gioiosa, R., Kursun, E., Cher, C.-Y., Isci, C., Buyuktosunoglu, A., Bose, P. & Valero, M. Power and Thermal Characterization of POWER6 System. (2010).
Jiménez, V.J., Gioiosa, R., Kursun, E., Cazorla, F., Cher, C.-Y., Buyuktosunoglu, A., Bose, P. & Valero, M. Trends and techniques for energy efficient architectures. (2010).
2009
Luque, C., Moreto, M., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. CPU accounting in CMP Processors. (2009).
Luque, C., Moreto, M., Cazorla, F., Gioiosa, R., Buyuktosunoglu, A. & Valero, M. ITCA: Inter-Task Conflict-Aware CPU Accounting for CMPs. (2009).
2008
Boneti, C., Cazorla, F., Gioiosa, R., Cher, C.-Y., Buyuktosunoglu, A. & Valero, M. Software-Controlled Priority Characterization of POWER5 Processor. (2008).at <http://www2.computer.org/portal/web/csdl/doi/10.1109/ISCA.2008.8>