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F. Sánchez, Cabarcas, F., Ramirez, A., and Valero, M., Scalable multicore architectures for long DNA sequence comparison, Concurrency and Computation Practice and Experience, vol. 23, no. 17. 2011.
A. Rico, Duran, A., Cabarcas, F., Etsion, Y., Ramirez, A., and Valero, M., Trace-driven simulation of multithreaded applications, 2011 IEEE International Symposium on Performance Analysis of Systems and Software. p. 87--96, 2011.
A. Vega, Rico, A., Cabarcas, F., Ramirez, A., and Valero, M., Comparing last-level cache designs for CMP architectures, IFMT '10: International Forum on Next-Generation Multicore/Manycore Technologies. 2010.
N. Vujic, González, M., Ayguadé, E., Martorell, X., Ramirez, A., and Cabarcas, F., DMA++: On the Fly Data Realignment for On-Chip Memories, 16th IEEE International Symposium on High-Performance Computer Architecture. Bangalore (India), 2010.
F. Cabarcas, Rico, A., Etsion, Y., and Ramirez, A., Interleaving Granularity on High Bandwidth Memory Architecture for CMPs, Intl. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS X). pp. 250-257, 2010.
F. Sánchez, Cabarcas, F., Ramirez, A., and Valero, M., Long DNA Sequence Comparison on Multicore Architectures, 16th international Euro-Par conference on Parallel processing. 2010.
A. Ramirez, Cabarcas, F., Juurlink, B., Mesa, M. A., Sánchez, F., Azevedo, A., Meenderinck, C., Ciobanu, C., Isaza, S., and Gaydadjiev, G. N., The SARC Architecture, IEEE Micro, vol. 30, no. 5. pp. 16-29, 2010.
Y. Etsion, Cabarcas, F., Rico, A., Ramirez, A., Badia, R. M., Ayguadé, E., Labarta, J., and Valero, M., Task Superscalar: An Out-of-Order Task Pipeline, IEEE/ACM Intl. Symp. on Microarchitecture (MICRO-43). pp. 89-100, 2010.
F. Cabarcas, Rico, A., Ródenas, D., Martorell, X., Ramirez, A., and Ayguadé, E., A module based Cell processor simulator, 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06). 2006.