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Rico, A. et al. Trace-driven simulation of multithreaded applications. 2011 IEEE International Symposium on Performance Analysis of Systems and Software 87--96 (2011).
Vega, A., Rico, A., Cabarcas, F., Ramirez, A. & Valero, M. Comparing last-level cache designs for CMP architectures. IFMT '10: International Forum on Next-Generation Multicore/Manycore Technologies (2010).
Cabarcas, F., Rico, A., Etsion, Y. & Ramirez, A. Interleaving Granularity on High Bandwidth Memory Architecture for CMPs. Intl. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS X) 250-257 (2010). at <>
Rico, A. et al. Performance and Power Evaluation of an In-line Accelerator. 2010 ACM International Conference on Computing Frontiers (2010).
Etsion, Y. et al. Task Superscalar: An Out-of-Order Task Pipeline. IEEE/ACM Intl. Symp. on Microarchitecture (MICRO-43) 89-100 (2010). at <>
Rico, A., Ramirez, A. & Valero, M. Task Management Analysis on the Cell BE. XIX Jornadas de Paralelismo, pp. 271-276, Castellón (Spain) 271-276 (2008).
Cabarcas, F. et al. CellSim: A Cell Processor Simulation Infrastructure. 2007 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07) 279-282 (2007).
Cabarcas, F. et al. CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator. XVIII Jornadas de Paralelismo de Zaragoza 181-188 (2007).
Rico, A. et al. Implementation and Validation of a Cell Simulator using UNISIM. 3rd HiPEAC Industrial Workshop (2007).
Cabarcas, F. et al. A module based Cell processor simulator. 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06) (2006).