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Armejach, A. et al. HARP: Adaptive Abort Recurrence Prediction for Hardware Transactional Memory. IEEE Conference on High Performance Computing (HiPC 2013) (2013).
Vallejo, E. et al. Chip Multiprocessors with Implicit Transactions. 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06) 167–170 (Academia Press, 2006).
Vallejo, E. et al. Implementing Kilo-Instruction Multiprocessors. International Conference on Pervasive Services (ICPS 2005) 325–336 (IEEE, 2005).
Vallejo, E. et al. KIMP: Multicheckpointing Multiprocessors. XVI Jornadas de Paralelismo (Thomson, 2005).