Publications

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2012
Negi, A., Armejach, A., Cristal, A., Unsal, O. & Stenström, P. Transactional prefetching: narrowing the window of contention in hardware transactional memory. Parallel Architectures and Compilation Techniques (PACT) 181-190 (2012).
2010
Felber, P., Rivière, E., Moreira, W.M., Harmanci, D., Marlier, P., Diestelhorst, S., Hohmuth, M., Pohlack, M., Cristal, A., Hur, I., Unsal, O., Stenström, P., Dragojevic, A., Guerraoui, R., Kapalka, M., Gramoli, V., Drepper, U., Tomić, S., Afek, Y., Korland, G., Shavit, N., Fetzer, C., Nowack, M. & Riegel, T. The Velox Transactional Memory Stack. Micro, IEEE 30, 76 -87 (2010).
2007
Bosschere, K.D., Luk, W., Martorell, X., Navarro, N., O'Boyle, M., Pnevmatikatos, D., Ramirez, A., Sainrat, P., Seznec, A., Stenström, P. & Temam, O. High Performance Embedded Architectures and Compilation Roadmap. (2007).
Galluzzi, M., Vallejo, E., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J.E. & Valero, M. Implicit Transactional Memory in Kilo-Instruction Multiprocessor. The Twelfth Asia-Pacific Computer Systems Architecture Conference (ACSAC 2007) 339–353 (2007).
2006
Vallejo, E., Galluzzi, M., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J.E. & Valero, M. Chip Multiprocessors with Implicit Transactions. 2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06) 167–170 (2006).
2005
Vallejo, E., Galluzzi, M., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J.E. & Valero, M. Implementing Kilo-Instruction Multiprocessors. International Conference on Pervasive Services (ICPS 2005) 325–336 (2005).
Vallejo, E., Galluzzi, M., Cristal, A., Vallejo, F., Beivide, R., Stenström, P., Smith, J.E. & Valero, M. KIMP: Multicheckpointing Multiprocessors. XVI Jornadas de Paralelismo (2005).