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Filters: Author is Mateo Valero and First Letter Of Title is O [Clear All Filters]
Object Oriented execution Model (OOM). New Directions in Computer Architecture (NDCA-2) (2011).
Object Orienteed Execution Model (OOM). 2nd Workshop on New Directions in Computer Architecture (NDCA-2) Held in Conjunction with the 38th International Symposium on Computer Architecture (ISCA-38) (2011).at <http://ndca2.saclay.inria.fr/papers/markovic.pdf>
Online Prediction of Applications Cache Utility. International Symposium on Systems, Architectures, MOdeling and Simulation (SAMOS) 169-177 (2007).
Online Prediction of Throughput for Different Cache Sizes. XVIII Jornadas de Paralelismo (2007).
Optimal Task Assignment in Multithreaded Processors: A Statistical Approach. Architectural Support for Programming Languages and Operating Systems (ASPLOS) (2012).
Optimal Task Assignment in Multithreaded Processors: A Statistical Approach. 17th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-2012) (2012).at <http://capinfo.e.ac.upc.edu/PDFs/dir00/file003944.pdf>
Optimal Use of Registers in Aggressive Superscalar Processors. XIV Jornadas de Paralelismo 553–558 (2003).
Optimization of Instruction Fetch for Decision Support Workloads. International Conference on Parallel Processing 238-245 (1999).
An Optimized Front-End Physical Register File with Banking and Writeback Filtering. Workshop on Power-Aware Computer Systems (PACS'04) 4–13 (2004).
Optimizing Instruction Fetch for Decision Support Workloads. 2nd Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-2) (1999).
Optimizing Long-Latency-Load-Aware Fetch Policies for SMT Processors. International Journal of High Performance Computing and Networking (IJHPCN) 2, (2004).
Out-of-Order Commit Processors. 10th International Symposium on High Performance Computer Architecture (HPCA-10) 48–59 (2004).
Out-of-Order Commit Processors. (2003).
Overcoming the Memor Wall with D-KIPs. 2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005) 99–102 (2005).